King, Ya-Chin (金雅琴)

Assistant Professor

Ph.D., University of California, Berkeley, USA, 1999

Thin gate dielectric reliability,

Non-volatile memory

CMOS image sensor cell design

Email: ycking@ee.nthu.edu.tw

　

Dr. Ya-Chin King was born in Taiwan, Republic of China. She received the B.S. degree in electrical engineering from National Taiwan University in 1992, and the M.S. degree in electrical engineering from University of California, Berkeley, in 1994. She received her PhD degree in May 1999, at University of California, Berkeley, on thin oxide technology and novel quasi-nonvolatile memory. She joined National Tsing-Hua University at Hsinchu, Taiwan in August 1999 as a assistant professor. Her research topics include: thin gate dielectric, CMOS image sensor and non-volatile memory design.

　

Recent Publication

Journal Paper

  1. Lin, F.R.-L.; Shih-Yun Lin; Mou-Lin Lee; Chen-Hao Boe; Ching-Pen Yeh; Po-Hao Wu; Ni, J.; Ya-Chin King; Charles Hsu "Novel source-controlled self-verified programming for multilevel EEPROMs " Electron Devices, IEEE Transactions on , Volume: 47 Issue: 6 , June 2000 : 1166 –1174

  2. Ya-Chin King; Tsu-Jae King; Chenming Hu.“A long-refresh dynamic/quasi-nonvolatile memory device with 2-nm tunneling oxide.” IEEE Electron Device Letters, Aug. 1999, vol.20, (no.8):409-11.

  3. Kevin Yang, Chenming Hu, and Ya-Chin King. "Oxide thickness characterization: models for quantum effect," Solid State Technology, Taiwan, no. 6, p. 51, 1999

  4. Liu, W.; Jin, X.; King, Y.; Hu, C.“An efficient and accurate compact model for thin-oxide-MOSFET intrinsic capacitance considering the finite charge layer thickness.” IEEE Transactions on Electron Devices, May 1999, vol.46, (no.5):1070.

  5. Dunggun Park, Ya-Chin King, Qiang Lu, Tsu-Jae King, Chenming Hu, and Others.“Transistor characteristics with Ta2O5 gate dielectric” IEEE Electron Device Letters, Vol. 19, No. 11 , November 1998 , p.441

  6. Ya-Chin King, Hiroshi Fujioka, Shiroo Kamohara, Kai Chen and Chenming Hu.“DC electrical oxide thickness model for quantization of the inversion layer in MOSFETs” Semiconductor Science and Technology, August 1998, no.13, p.963

  7. Chenming Hu, Donggun Park, Ya-Chin King."Thin gate oxides promise high reliability " Semiconductor International, July 1998, p.215

  8. Wen-Chin Lee; Ya-Chin King; Tsu-Jae King; Chenming Hu." Observation of reduced poly-gate depletion effect for poly-Si/sub 0.8/Ge/sub 0.2/-gated NMOS devices." Electrochemical and Solid-State Letters, July 1998, vol.1, (no.1):58.

  9. Wen-Chin Lee, Ya-Chin King, Tsu-Jae King and Chenming Hu."Investigation of Poly-Si1-xGex for dual-gate CMOS technology" IEEE Electron Device Letters, July 1998, vol.19, no.7, p.247.

  10. Ya-Chin King, Hiroshi Fujioka, Shiroo Kamohara and Chenming Hu."Small-signal electron charge centroid model for quantization of inversion layer in a metal-on-insulator field-effect transistor" Applied Physics Letters, June 1998, vol.72, no.26 p.3476.

  11. Ya-Chin King; Hisorhi Fujioka; Shiroo Kamaharo; Wen-Chin Lee, Chenming Hu."AC charge centroid model for quantization of inversion layer in n-MOSFET", Proceedings of Technical Papers of 1997 International Symposium on VLSI Technology, system and Applications, p.245

  12. Ya-Chin King; Bin Yu; Pohlman, J.; Chenming Hu."Punchthrough diode as the transient voltage suppressor for low-voltage electronics." IEEE Transactions on Electron Devices, Nov. 1996, vol.43, (no.11):2037.

　

Conference Paper

  1. Kevin J. Yang, Ya-Chin King, Chenming Hu. “Quantum effect in oxide thickness determination from capacitance measurement” Proceeding of the VLSI technology, June 1999, p.77

  2. Ya-Chin King, Tsu-Jae King, Chenming Hu.“MOS memory using germanium nanocrystals formed by thermal oxidation of Si1-x Gex” Proceedings of Technical Papers of International Electron Device Meeting, December 1998, p. 115

  3. Ya-Chin King, Tsu-Jae King, Chenming Hu.“Sub-5nm multiple-thickness gate oxide technology using oxygen implantation” Proceedings of Technical Papers of International Electron Device Meeting, December 1998, p. 585

  4. Shiro Kamohara; Ya-Chin King; Kai Chen; Dongun Park; and others."MOSFET carrier mobility model based on the density-of-state at the DC-centroid in the quantized inversion layer." International Conference on VLSI and CAD, Seoul, South Korea, 1997. p.171.

  5. Fujioka, H.; Wann, H.-J.; Park, D.-G.; King, Y.-C.; and others."Tunneling current through MIS structures with ultra-thin insulators." Materials Reliability in Microelectronics VI. Symposium. Material Research Society 1996. p. 415

Patent

1. United States Patent Entitled, “ Low voltage punch through transient suppressor employing dual base structure”Patent No.: 5,880,511 Issued: March 9, 1999Serial No.: 08/497,079D&R Docket No.: SEMT-001